ELECTRICAL AND ELECTRONICS ENGINEERING-SUPLY 2K6

Code No: RR12302 Set No. 1
I B.Tech Supplementary Examinations, Aug/Sep 2006
ELECTRICAL AND ELECTRONICS ENGINEERING
(Bio-Technology)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
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1. (a) Derive an expression for the total power consumed in a 3-phase, delta con-
nected load, connected to 3-phase balanced supply.
(b) Three equal impedances of (6+J8) ohm are connected in delta fashion across
400V, 3-phase balanced supply. Calculate the phase current, line current and
total power consumed by the load. [8+8]
2. (a) Define efficiency of a transformer? Obtain the condition for maximum effi-
ciency.
(b) A 25KVA, 2500 / 250V, 1-phase transformer has the following losses. Iron
loss = 960 watts, Full load copper loss = 1500 watts. Calculate at what load
maximum efficiency occurs, and the value of maximum efficiency at unity
power factor. [8+8]
3. (a) Determine Vo1 and Vo2 for the networks shown in the figure 1 and figure 2
below.
Figure 1:
(b) Explain the following terms.
i. Cut-in voltage
ii. Reverse saturation current.
iii. Forward bias
iv. Reverse bias. . [5+5+6]
4. (a) In a bridge rectifier, the transformer is connected to 220V, 60Hz mains and
the turns ratio of the step down transformer is 11:1. Load resistance is 800 .
Assuming the diode is ideal, find
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Code No: RR12302 Set No. 1
Figure 2:
i. Idc
ii. Voltage across the load
iii. PIV
(b) Explain the following terms:
i. Ripple factor
ii. Peak Inverse voltage
iii. Efficiency
iv. TUF
v. Form factor
vi. Peak factor. [6+10]
5. (a) Define the following BJT switching times with suitable sketches..
i. Delay time,
ii. Turn-on Time
iii. Storage Time
iv. Fall time
v. turn-off time
(b) What are the bias compensation techniques? Explain the operation of one
among them.
(c) An n-p-n transistor with β = 50 is used in a CE circuit with VCC = 10V,
and RC = 2K. The bias is obtained by connecting a 100K resistance from
collector to base. Assume VBE=0V. Find the Quiescent point. [6+4+6]
6. (a) Define class A, B, AB, B and C operation of amplifiers.
(b) Draw the circuit diagram of a push-pull amplifier and explain how even har-
monics are eliminated.
(c) Derive the relation between gain with feed back and without feedback.[6+6+4]
7. (a) Draw the circuit diagram of wien bridge oscillator using BJT. Show that the
gain of the amplifier must be at least 3 for the oscillations to occur.
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Code No: RR12302 Set No. 1
(b) For the fixed-bias Ge transistor, npn type, the junction voltages at saturation
and cutoff one in active region, may be assumed to zero. This circuit operate
properly over the temperature range -50oC to 75oC and to just start malfunc-
tioning at these extremes. The various circuit specifications are: VCC = 4.5v,
VBB = 3v, hFE=40 at -50oC, and hFE=60 at 75oC, ICBO = 4μA at 25oC and
doubles every 10oC. Collector current is 10μA. Design the values of Rc1, R1
and R2.. [8+8]
8. (a) Give the Boolean functions: F= xy + x′y′ +y′z
i. Implement with only OR and NOT gates.
ii. Implement with only AND and NOT gates.
(b) Explain the principle of master-slave JK flip-flop.
(c) Find the complement of given function and reduce it to a minimum number
of literals.(BC′+A′D) (AB′+CD′). [6+5+5]
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Code No: RR12302 Set No. 2
I B.Tech Supplementary Examinations, Aug/Sep 2006
ELECTRICAL AND ELECTRONICS ENGINEERING
(Bio-Technology)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆ ⋆ ⋆ ⋆ ⋆
1. (a) State RMS value of a voltage waveform and find the RMS value and crest
factor of the waveform v(t) of figure.1 below
Figure 1:
(b) What is potential difference?
(c) An electric heater takes 3KWat 240 volts. Calculate the current and resistance
of the heating element. [10+2+4]
2. (a) Show that single phase induction motors are not self starting.
(b) Explain the construction and working principle of any type of 1-phase induc-
tion motor. [8+8]
3. (a) Draw the equivalent circuits of
i. ideal diode
ii. Simplified model
iii. piece wise linear model. Draw their characteristics.
(b) Derive the expression for diffusion capacitance in a diode. [10+6]
4. (a) The half wave rectifier shown in the figure:2 below is fed with a sinusoidal
voltage v=20sin100t.
i. Sketch the output waveform.
ii. Determine the d.c. output voltage assuming ideal diode behaviour.
iii. Repeat the calculations assuming the simplified diode (silicon) model.
(b) Draw the circuit diagram of full wave rectifier having two diodes and explain
its operation. [8+8]
5. (a) Draw the circuit of a transistor (n-p-n) in the CB configuration. Sketch the
input & output characteristics and explain the shape of the curves qualita-
tively.
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Code No: RR12302 Set No. 2
Figure 2:
[8+8]
Figure 3:
(b) For the circuit in figure 3 shown below for n-p-n transistor, calculate the
collector and base currents. Assume hFE = 50. Explain Q point.
6. (a) Compare the three transistor amplifier configurations with related to AI , Av,
Ri and R0.
(b) For the circuit shown calculate AI , AV , Ri and R0, using approximate h-
parameter model. Assume hfe = 50, hie = 1100, hoe = 25 μA/V, hre = 2.5
× 10−4 as shown in the figure 4 below.
[6+10]
Figure 4:
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Code No: RR12302 Set No. 2
7. (a) Explain the effect of temperature on
i. i/p bias current
ii. i/p off set current
iii. i/p offset voltage.
(b) Explain in brief the applications of OP AMP.. [8+8]
8. (a) State and prove D Morgau’s theorems.
(b) Realize NOR gate using minimum number of NAND gates.
(c) Find the 2’S complement of (46)10.. [5+5+6]
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Code No: RR12302 Set No. 3
I B.Tech Supplementary Examinations, Aug/Sep 2006
ELECTRICAL AND ELECTRONICS ENGINEERING
(Bio-Technology)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆ ⋆ ⋆ ⋆ ⋆
1. (a) Define the terms
i. Average value
ii. R.M.S. value
iii. peak factor
iv. form factor.
(b) Determinate peak factor and form factor of the wave form shown in the figure
1 below.
Figure 1:
(c) Draw a rectangular waveform for the given specifications Vm = 10V, Time
period (T) =10m sec, Dutye cycle = 40%.. [5M+8M+3M]
2. (a) Give the constructional features of “CORE” and “Shell” types of transformers,
and give the advantages and disadvantages of each type.
(b) A 5 KVA, 2300 / 230V, 50 HZ transformer was tested for the iron loss with
normal excitation and copper losses at full load, and these were found to be
40 watts and 112 watts respectively. Calculate efficiency of the transformer at
i. full load.
ii. half full load.
Assume the power factor of the load as 0.8. [8+8]
3. (a) Determine Vo1 and Vo2 for the networks shown in the figure 2 and figure 3
below.
(b) Explain the following terms.
i. Cut-in voltage
ii. Reverse saturation current.
iii. Forward bias
iv. Reverse bias. . [5+5+6]
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Code No: RR12302 Set No. 3
Figure 2:
Figure 3:
4. (a) The half wave rectifier shown in the figure:4 below is fed with a sinusoidal
voltage v=20sin100t.
i. Sketch the output waveform.
ii. Determine the d.c. output voltage assuming ideal diode behaviour.
iii. Repeat the calculations assuming the simplified diode (silicon) model.
Figure 4:
(b) Draw the circuit diagram of full wave rectifier having two diodes and explain
its operation. [8+8]
5. (a) Define the following BJT switching times with suitable sketches..
i. Delay time,
ii. Turn-on Time
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Code No: RR12302 Set No. 3
iii. Storage Time
iv. Fall time
v. turn-off time
(b) What are the bias compensation techniques? Explain the operation of one
among them.
(c) An n-p-n transistor with β = 50 is used in a CE circuit with VCC = 10V,
and RC = 2K. The bias is obtained by connecting a 100K resistance from
collector to base. Assume VBE=0V. Find the Quiescent point. [6+4+6]
6. (a) Give the advantages of negative feedback amplifier.
(b) Draw the circuit of a voltage shunt feedback amplifier and explain.
(c) When the negative feedback is applied to an amplifier of gain 100, the overall
gain falls to 50. Calculate
i. the feedback factor ’β’
ii. If the same feedback factor is maintained, find the value of amplifier gain
required if the overall gain is to be 75. [4+6+6]
7. Define the following terms with reference to OP-AMPs:
(a) i/p bias current
(b) i/p offset current
(c) open loop gain
(d) i/p off set voltage
(e) o/p offset voltage
(f) CMRR
(g) PSSR
(h) Slew rate.. [16]
8. (a) Explain how a shift register is used as a Ring counter. Draw the O/P waveform
from each flip-flop of a 3-stage unit.
(b) Prove that if w′x + yz = 0, then wx + y′ (w′+z′) = wx + xz + x′z′ + w′y′z.
(c) Represent the given negative numbers in sign-magnetude, 1’S and 2’S com-
plement representation in 12-bit format.
i. -64
ii. -512.. [6+6+4]
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Code No: RR12302 Set No. 4
I B.Tech Supplementary Examinations, Aug/Sep 2006
ELECTRICAL AND ELECTRONICS ENGINEERING
(Bio-Technology)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆ ⋆ ⋆ ⋆ ⋆
1. (a) Derive an equation for the total power consumed in a three phase circuit.
Will it depend on the type of load connected?
(b) Three identical impedances 106 53.10 ohm [10 (cos(53.1)0 + Jsin(53)0] are
connected in delta to a 3-phase, 240volt balanced supply. Find the line cur-
rents and power consumed. [8+8]
2. (a) Explain the constructional details of a synchronous machine giving the reasons
for making two types of rotors.
(b) Explain auxiliary motor starting of synchronous motors. [6+10]
3. (a) Determine the range of input voltage that maintains an output voltage of 10V
at the output for the regulator shown in the figure 1 below.
Figure 1:
(b) Explain the applications of Zener diode.
(c) Explain static and Dynamic Resistance of a diode. [4+8+4]
4. (a) Give the application of SCR, DIAC and TRIAC.
(b) For the network shown in the figure:2 below sketch V0 and determine Vdc if
i/p is a sine wave whose RMS value is 110v.
5. (a) Define different stability factors of biasing circuits using BJT.
(b) List out different transistor biasing methods and compare their merits and
demerits.
(c) Write short notes on

[8+8]
Figure 2:
i. Thermal runaway
ii. Early effect [6+6+4]
6. (a) Give the advantages of negative feedback amplifier.
(b) Draw the circuit of a voltage shunt feedback amplifier and explain.
(c) When the negative feedback is applied to an amplifier of gain 100, the overall
gain falls to 50. Calculate
i. the feedback factor ’β’
ii. If the same feedback factor is maintained, find the value of amplifier gain
required if the overall gain is to be 75. [4+6+6]
7. (a) List out the characteristics of OP-AMP.
(b) Explain about the concept of ‘virtual Ground’ in OP AMPs.
(c) Draw the circuit diagram of emitter coupled differential amplifier and obtain
its d.c analysis.. [6+4+6]
8. (a) Explain with a block diagram the major blocks of a digital computer.
(b) Implement the following with either NAND or NOR gates. Use only 4 gates
only the normal inputs are available.
F = w′xz + w′yz + x′yz′ + wxy′z.
(c) With a circuit diagram, explain Counter type A-to-D converter.. [4+6+6]
. [8+8]
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